Transistor phase detector



Nov. 24, 1959 w. o. ESSLER 2,914,684

TRANSISTOR PHASE DETECTOR Filed March 18, 1957 3 Sheets-Sheet l Ourpur Saw/v01. K p

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Nov. 24, 1959 w. o. ESSLER 2,914,684

TRANSISTOR PHASE DETECTOR Filed March 18, 1957 3 Sheets-Sheet 2 l/fiOfiE/QRTING REG ION 4i I NV E NTO R WnRREN 0. 331.55: 5Y2 g H r ran/vs Y3 Nov. 24, 1959 w. o. ESSLER 2,914,684

TRANSISTOR PHASE DETECTOR Filed March 18, 1957 3 Sheets-Sheet 3 FIE 4 g 3/ Av v i Lia OUTPUT SIG/v01. f V0117 GE V t CURRENT A f B CURRENT A C SIG/V191. D

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O UTPUT \J E CURRENT 2 INVENTOR WHRREN 0. E JJLL'R M Q QZMMM 0 TTOR NE Ue ed W Pa nt This invention relates to phase detectors of the type which utilize switching in their operation. I The switching type of phase detector is commonly used in aircraft navigation equipment to determine aircraft bearing from a given station by enabling phase measurement between a pair of signals received from the station. Furthermore, such phase detectors can be used to determine aircraft distance from a given station by a phase measurement betweenitransmitted and locally derived stable signals that were initially phase synchronizedl' J m .This invention uses a unique transistor-arrangement which cannot be called either a common emitter, common base, or'c'ommon collector arangement, since no electrodejis' common to, both the input and output of any transistor used within the invention. Rather, the invention mice Figure 2 shows'wave-forms used in explaining the operation of the circuit in Figure 1;

Figures 3A and B illustrate the characteristics of the particular transistor arrangement used in this invention;

Figure 4 is a schematic diagram of another form of the invention which provides full-wave operation; and, "Figure 5 shows wave-forms used in explaining the operation of the invention in Figure 4.

Now referring to Figure 1, a pair of transistors 10 and 11 have their base connected together at point 12 and their collectors connectedtogether at point 13. The dual transistors used in this invention may be chosen from any type, although silicon transistors will generally give superior temperature stability.. However, in any single form of the invention, dual transistors 10 and 11 are chosen to be the same type of transistor. For example, they can both be either NPN or PNP, but a given pair never includes opposite types. A first input signal is provided between the bases and collectors of transistors 10 and 11, that is between points 12 and 13. Hence in Figure 1, the first input signal is provided through a transformejr'16 having a secondary 17 connected between points 12 and 13 and its primary 18 connected to the first signal source. The first input signal appears as voltage V between the collector and base of each of the transistors 10 and 11. Voltage V is the switching voltage requires a two transistor arrangement that enables switching of the impedance presented by their dual emitters.

I A first inputfsignal, which isthe switching signal is applied simultaneously between' the base and collector of the" dual transistors. A second signalis applied between their dual emitters. Phase-detection between the two signals isobtained by integrating the currentre- 'sponsive inthecircuit of the dual emitters. A null conditionin the integrated joutputis obtained when a 90 phase relationship exists between the two input signals;

and the direct-current polarity of the integrated output depends, upon which way the phase of the two compared signals deviates from the. 90 condition.

The basic arrangement of the invention, usinga pair of transistors, provides ahalf-wave type of operation.

Dueto the high impedance provided at the output of this inven'tion, very little loss occurs from the integration nieansduring the non-operative half cycles; However, the output level of,the invenion can be doubled by 'utililz'ing an arrangement having two pairs of transistors to provide a full wave type of operation.

invention provides an unusually stable type of phase detector, wherein its operating characteristics vary veryllittle at a given temperature or even with large I temperature changes.

With prior phase detectors utilizing diodes, it has been :found that their output characteristics significantly change even when operating at a single temperature.

Furthermore, the very high impedance of the invention, when its input signals are off, permits its'outputintegrating circuit to'retain its charged voltage level for a significant length of time. Thus, the invention is capable of providing a phase detector that can remember its last voltage level. This characteristic becomes important when phase-comparing signals, wherein one or both of them are being gated off and on,.which is the casein some types of navigation systems. Furtherobjects, features and advantages of this invention will become apparent to a person skilled in the art upon further study of the specification and the drawings in which: 7

Figure 1 illustrates a basic form of the invention;

for the transistors and can be a sine wave of the type shown in Figure 2A. However, since the first signal provides switching, it can also be a square-wave type of signal. 1 Y

Due to the non-linear input characteristics of transistors, their input circuit current I; caused by .voltage V;

second signal source, which provides the wave illustrated in Figure 2C having the same frequency as the first signal; p v y Y The output of the invention is obtained from the direct-current components in the dual-emitter circuit and istaken from.a;pair of output terminals 3l'and 32 connectedacross capacitor C of integrating filter 26.

The impedance looking into dual emitters 21 and 22 is very high when input current I is zero or negative. Therefore, integrator circuit 26 can have a very long time constant. 1 r

The output impedance characteristics of dual transistors 10 and 11 can be observed from Figures 3A and 3B, which illustrate the current-voltage relationships in the dual emitter circuit at different constant values of basecollector circuit'current. Thus, in Figure SE, a series of curves 41, 42, and 43 are shown having respectively higher positive values of input current I Note that these various positive input values have a linear operating region 44, which represents a linear resistance. It can be seen that a change in the positive value of input curent I does not change the input resistance of the pair of transistors within their linear operating region.

. On the other hand, a negative input voltage permits very little curent I and provides, a very high resistanceoutputcharacteristic represented by the slope of another curve 46.

Consequently, a positive voltage V causes low dualemitter resistance, which might be of the order of 50 phase source of the second input signal.

ohms; an, on the other hand, a negative input voltage V causes a dual-emitter resistance of the order of a megohm.

. Hence, when an alternating inputsignal V .is applied, the dual-emitter resistance .is switched alternately from 50 ohms .to one megohm with the positive .andneg'ative loops; respectively, of input'volta'ge V 7 [Figures 1 and 3A show PNP transistors, and it is obvious that the same relationships hold with reversed polarities. when the dual transistors are the NPN type.

The circuit of Figure 1 is operated in.a half-wave manner becauseit provides output current only during the positive loops of input signal V The integrated output of the invention is zero when the'two input signals have. a 90phase relationship. 1 This occurs because the impedance level of the dual-emitters is switched 'by the first inputifrom a high to a low value (and vice versa) at the instant that the second input signal is at its "peak values. The emitter switching their causes the instantaneous current I illustrated in Figure 2D. Thus, the switching provides output current that begins at the peak of each positive loop of'the second signal voltage and ends at the peak of the followingnegative loop, because it is at these resistances that positive loops of switching voltage V begin and end. No current output is provided during the negative loops of the twitching signal because of thevery high dual-emitter impedance which then exists. It can be realized by viewing Figure 2D that the integrated value of this wave is zero, since the areas of the positive and negative portions "of the wave are equal. As a result, no charge is acquired by capacitor C during the90 condition of the input signals. 7

If the phase relationship between the input signals changes from the 90 condition, the output will not then switch at precisely the peaks of the second signal, but will switch a little later or a little earlier, depending upon which way the phase: changes. grated value of the the voltage will no longer be zero but will be either positive or negative depending upon the phase condition. 7

Figure 4 illustrates a full-wave version 'of the invention; Figure 4 includesfirst signal transformer 16 which has a pair of equal opposite-phase secondary windings 17a'and 17b, which are connected together at adjacent ends byequal resistors 61a and 61b that have a cominon point 62 connected to ground. A pair of loading ondary 127 with agrounded center tap 64. A pair .of

Each pair As a result, the intesequentially combines their outputs; and the combined outputs appear to the integration circuit as full-wave operation. Consequently, the system in Figure 4 is capable of providing twice the integrated output level of the half-wave system in Figure 1. Figures 5A through 5C illustrate the first input signal and the resulting currents provided in the input circuits of both pairs of transistors in Figure 4. Figure 5Dv shows the second input signal; and Figure 5E illustrates "the full-wave type of instantaneous current 1 appearing to the input of the integration circuit.

Although this invention has been described with respect to particular embodiments thereof, it is not to be so limited, as changes and modifications may be made therein which are within the full intended scope of the invention as defined by the appended claims.

I claim:

. 1. Transistor means for phase comparing first and second signals comprising a first pair oftransistors'ofthe same type, and a-second pair of transistors of the same type, a first transformer having itsprimary connectable to said first signal, and'having a pair of opposite-phased secondary windings, with one winding being connected between the bases and collectors of said first pair of transistors, and its other winding being connected be tween the bases and collectors of said second pair of transistors, resistive means connecting one side of each of said secondary windings to ground, an integration circuit having one input terminal connected to the emit tersof one transistor 'in each pair, a second transformer havingits primary connectable to said second signal, and having a secondary with a center tap connected to the other side of said integration circuit, -one end of said center-tapped secondary being connected to the emitter of the remaining transistor in said first. pair, and the opposite end of said center-tapped secondary-being connected to-t'he emitter of the remaining transistor in the secondpair, with'the direct-voltageoutput of said inte gration circuit being dependent upon the phase between said first and second signals.

V 2. Transistor means for phase -comparingfirst and second signals, comprising a first pair of transistors of .thesametype having their bases connected together and their collectors connected together, and a second pair of transistors of the same type having their bases connected together and their collectors connected together, a first transformer having its primary connectable to said first signal, andhaving a .pair of opposite-phased seccollectors of said first pair, and alfirst resistor connected resistors and 67 are connected acrossthe opposite halves of secondary 127.

Low-pass or integrating filter 26 comprising resistor R and capacitor C is connected in series between center 'tap 64 and the emitters of transistors 10a and 10b. One'end of secondary 127v is connected to the emitterof transis-- tor 11a and the otheriend ofsecondary 127 is connected to ,the emitter of transistor 11b. 7

Each'half a or b of the circuit in Figure 4 includes a separate setof dual transistors, a separate'opposite-phase source of the first input signal, and a separate oppositehalves a and b of the system are half-wave devices of the same type as described in connection with Figure 1. As

a result of the opposite phasing of both input signals to the opposite halves of the circuit in Figure 4, they provide instantaneous output currents 1 during opposite The opposite between the other endof said one winding and the bases of said first pair, the other secondary winding havingone end connected: to the collectors of said second-pair of transistors, and a second resistor connected between the other end ofsaid other secondary winding and the bases of said second .pair of transistors, a second transformer havingitsprimary connectable to said second signal, and

' having a center-tapped secondary, with its center-tap connected to ground, one end of said center-tapped secondary connected to theemitter of one transistor in said first pair, and the opposite end of said center-tapped secondary being connected to the emitter of one tran- {References on following Page) A References Cited in the file of this patent UNITED STATES PATENTS Barney Nov. 1, 1949 Raisbe'ck et a1. July 19, 1955 Johanson -Feb. 5, 1957 Sziklai June 11, 1957 6 Van Allen Oct. 8, 1957 Cluwen Aug. 5, 1958 Schaefer et a1. Sept. 2, 1958 FOREIGN PATENTS France July 16, 1956 

